Using HDMI Made Easy: HDMI-VGA and VGA-HDMI Converters
In the consumer electronics market, TVs, projectors and other multimedia devices have adopted the high-definition multimedia interface (HDMI).®) technology, making HDMI a globally recognized interface. I believe that soon, all multimedia devices need to be equipped with this interface. The HDMI interface has become popular in home entertainment, and it has recently become more popular in portable devices and automotive infotainment systems.
Implementing standardized multimedia interfaces is an inevitable requirement in the highly competitive consumer electronics market, where time-to-market is critical. In addition to increasing market acceptance, using a standard interface can greatly improve compatibility between projectors, DVD players, HDTVs, and other devices from different manufacturers.
However, in some industrial applications, the transition from analog to digital video takes longer than in the consumer electronics market, and many devices have not yet adopted new digital methods to transmit synthetic audio and video data. These devices still use analog signals as the only video transmission path, possibly due to specific market or application specific requirements. For example, for projectors, some customers still prefer a Video Graphics Array (VGA) cable, while others use an Audio/Video Receiver (AVR) or media box as a hub, connecting an HDMI cable to the TV instead of a Set of messy and unsightly cables, as shown in Figure 1.
Figure 1. The media box converts the analog signal to HDMI
Newcomers may consider HDMI to be a relatively complex standard that requires validated software drivers, interoperability and compatibility testing to ensure that one device will work properly when used in conjunction with a variety of other devices. This may seem a little tricky to grasp, and it often happens when new technology is encountered.
However, advanced semiconductor technologies are addressing these challenges, with improvements in both the analog and digital domains, including equalization of poor differential signals through higher performance blocks, and the use of more complex algorithms to reduce software overhead and correct bit errors .
This article explains how advanced semiconductor solutions and clever software can help enable HDMI. Two basic devices—HDMI-VGA (“HDMI2VGA”) and VGA-HDMI (“VGA2HDMI”) converters—provide engineers familiar with video applications with an easy way to convert analog video to and from digital video.
While HDMI has become the de facto high-definition video interface, VGA is still the most commonly used interface on laptops. This article also explains how to interconnect the two interfaces.
Introduction to HDMI Applications and Video Standards
The HDMI interface transmits video, audio, and data in packets using transfer minimum differential signaling (TMDS) lines. In addition to these multimedia signals, the interface also includes Display Data Channel (DDC) signals for exchanging Extended Display Identification Data (EDID) and High-bandwidth Digital Content Protection (HDCP).
In addition, the HDMI interface can also be equipped with Consumer Electronics Control (CEC), Audio Return Channel (ARC) and Home Ethernet Channel (HEC). Since these are not an important part of the application described in this article, they will not be discussed in this article.
EDID data consists of a 128-byte (VESA – Video Equipment Standards Association) or 256-byte (CEA-861 – Consumer Electronics Association) data block that specifies the video and (optional) audio capabilities of a video receiver (Rx). EDID is utilized by the video source (player) I2The C protocol is read from the video receiver over the DDC line. The video source must send the preferred or best video mode supported by the video sink and listed in the EDID. The EDID may also contain information about the video receiver’s audio capabilities, as well as a list of supported audio modes and corresponding frequencies.
Both VGA and HDMI have DDC connections to support communication between video sources and receivers. The first 128 bytes of the EDID can be shared by VGA and HDMI. In the experience of Analog Devices’ HDMI Compatibility Test (CT) lab, the first 128 bytes of the EDID are more error-prone because some engineers are not familiar with the strict requirements of the HDMI specification, and most articles focus on EDID expansion modules.
Table 1 shows the error-prone portion of the first 128 bytes of the EDID. Refer to the CEA-861 specification for details on the design of CEA expansion modules beyond the first 128 bytes of the EDID.
Table 1. Introduction to EDID
address |
byte |
describe |
Notes |
00h |
8 |
Header: (00 FF FF FF FF FF FF 00)h |
Must-Have Fixed Module Header |
08h |
10 |
Supplier and Product Identification |
|
08h |
2 |
ID manufacturer name |
Microsoft®Three compressed ASCII characters published |
12h |
2 |
EDID Structure Versions and Revisions |
|
12h |
1 |
Version number: 01h |
fixed |
13h |
1 |
Revision number: 03h |
fixed |
18h |
1 |
Feature support |
Features like power management and color types. Bit 1 should be set to 1. |
36h |
72 |
18-byte data module |
|
36h |
18 |
Preferred Timing Mode |
Represents a timing that supports producing the best quality screen image. For most flat panel displays, the preferred timing mode is the panel’s native timing. |
48h |
18 |
Detailed Timing #2 or Display Descriptor |
Indicates detailed timing and can also be used as a display descriptor. The monitor descriptor should use two words, one for the monitor range limit and one for the monitor name. The detailed timing block should precede the display descriptor block. |
5Ah |
18 |
Detailed Timing #3 or Display Descriptor |
|
6Ch |
18 |
Detailed Timing #4 or Display Descriptor |
|
7Eh |
1 |
Number of expansion modules N |
The number of subsequent 128-byte EDID expansion modules. |
7Fh |
1 |
checksum |
The 1-byte sum of all 128 bytes in this EDID module shall equal 0. |
80… |
|
Module mapping or CEA extension |
The timing formats for VGA and HDMI are respectively defined by the two standard setting groups mentioned above: VESA and CEA/EIA. For the definition of VESA timing format, see “VESA Monitoring Timing and Coordinated Video Timing Standard”; for the definition of HDMI timing format, see CEA-861. VESA timing formats include standards primarily used in PCs and laptops, such as VGA, XGA, SXGA, etc. CEA-861 describes the standards used by televisions and ED/HD monitors, such as 480p, 576p, 720p, and 1080p. Of these timing formats, only one, 640 × 480p @ 60 Hz, is mandatory, shared by the VESA and CEA-861 standards. Both the PC and the TV must support this mode, so this example uses it. Table 2 compares commonly supported video standards. Please refer to the corresponding specification for detailed data.
surface2. most commonly usedVESAandCEA-861standard(p = line by line;i = interlaced)
VESA(Monitor monitor timing) |
CEA-861 |
640 × 350p @ 85MHz |
720 × 576i @ 50Hz |
640 × 400p @ 85Hz |
720 × 576p @ 50/100 Hz |
720 × 400p @ 85Hz |
640 × 480p @ 59.94/60 Hz |
640 × 480p @ 60/72/75/85 Hz |
720 × 480i @ 59.94/60 Hz |
800 × 600p @ 56/60/72/75/85 Hz |
720 × 480p @ 59.94/60/119.88/120Hz |
1024 × 768i @ 43Hz |
1280 × 720p @ 50/59.94/60/100/119.88/120 Hz |
1024 × 768p @ 60/70/75/85 Hz |
1920 × 1080i @ 50/59.94/60/100/200 Hz |
1152 × 864p @ 75Hz |
1920 × 1080p @ 59.94/60 Hz |
1280 × 960p @ 60/85 Hz |
1440 × 480p @ 59.94/60 Hz |
1280 × 1024p @ 60/75/85 Hz |
1440 × 576p @ 50Hz |
1600 × 1200p @ 60/65/70/75/85 Hz |
720(1440) × 240p @ 59.94/60 Hz |
1920 × 1440p @ 60/75 Hz |
720(1440) × 288p @ 50Hz |
Introduction to application and some requirements
An important requirement for HDMI2VGA and VGA2HDMI converters is to ensure that the signal sent by the video source conforms to the correct video standard. This is achieved by providing a video source with the appropriate EDID content. Once received, the correct video standard can be converted to the final HDMI or VGA standard.
The functional block diagrams in Figure 2 and Figure 3 show the corresponding process for HDMI2VGA and VGA2HDMI conversion. The HDMI2VGA converter assumes that the HDMI Rx has built-in EDID.
Figure 2. HDMI2VGA Converter with Audio Extraction
Figure 3. VGA2HDMI Converter
working principle
VGA2HDMI:The VGA source reads the EDID content from the sink, utilizes the DDC line channel to get a list of supported timings, and then the video source starts sending the video stream. VGA cables have RGB signals and separate horizontal (HSYNC) and vertical (VSYNC) sync signals. The downstream VGA ADC locks to HSYNC to regenerate the sampling clock. The VGA decoder aligns the incoming sync signal with the clock.
A data enable (DE) signal indicates the active area of the video. The VGA ADC does not output this signal, it is mandatory for HDMI signal encoding. The logic high portion of DE represents the active pixel, or the visible portion of the video signal. The logic low portion of DE represents the blanking portion of the video signal.
Figure 4. Horizontal DE generation
Figure 5. Vertical DE generation
The DE signal is essential to produce a valid HDMI stream. If there is no DE signal, it can be compensated by the HDMI transmitter (Tx), which regenerates the DE signal. Modern HDMI transmitters can utilize several parameter settings, such as HSYNC delay, VSYNC delay, effective width and effective height, etc., to generate DE signals from the HSYNC and VSYNC inputs (as shown in Figure 4 and Figure 5), ensuring compatibility with HDMI signal transmission.
HSYNC delay defines the number of pixels from the HSYNC leading edge to the DE leading edge. The VSYNC delay defines the number of HSYNC pulses between the leading edges of VSYNC and DE. The effective width indicates the effective number of horizontal pixels, and the effective height indicates the number of lines of the effective video. The DE generation function can also be used for display functions, such as centering the active video area on the screen.
Display position adjustment is mandatory for VGA input. The first and last pixels of the digitized analog input signal must not be near or coincident with any HSYNC/VSYNC pulses. The low period of the DE signal (such as the vertical or horizontal blanking interval) is used to transmit additional HDMI data and audio packets and shall not violate the requirements. This misalignment can be caused by the ADC sampling stage. Black bars in the viewable area of the screen may mean that the active area is not aligned. For composite video broadcast signals (CVBS), this phenomenon can be corrected by overscanning by 5% to 10%.
VGA is designed to display the entire active area without dropping anything. The picture is not overscanned, so display position adjustment is important for VGA to HDMI. In the best case, black bars can be automatically recognized and the image can be automatically adjusted to the center of the final screen, or manually adjusted based on readback information. If the VGA ADC is connected to the back-end scaler, the valid video will be correctly realigned to the entire viewable area.
However, using scalers to address the misalignment of active video regions increases design cost and associated risks. For example, with scalers and video patterns, a black area around a small white box in the active area may be considered a dead bar and eliminated. A black area around a small white box in the active area may be considered a dead bar instead be eliminated. After the black area is eliminated, the white frame becomes a pure white background. On the other hand, a half-white, half-black image produces distortion. To prevent such inappropriate distortions, some preventive mechanism must be in place.
Once the HDMI Tx locks and regenerates the DE signal, it sends the video stream to the HDMI receiver (like TV, etc.). At the same time, on-chip audio devices, such as audio codecs, can also send audio streams to HDMI Tx via I2S, S/PDIF or DSD. One of the advantages of HDMI is that it can send video and audio at the same time.
After the VGA2HDMI converter board is powered up and the source and sink are connected, the MCU should read back the EDID content of the HDMI sink via the HDMI Tx DDC line. The MCU should copy the first 128 bytes of the EDID slightly changed to the EEPROM of the VGA DDC channel, because the VGA DDC channel generally does not support the CEA extension for HDMI. Table 3 lists the required changes.
Table 3. List of changes required for the VGA2HDMI converter
Change |
reason |
EDID 0x14[7]from 1 to 0 |
Indicates analog VGA input |
Change Existing Timing, Standard Timing, Preferred Timing and Detailed Timing |
Timings exceeding the maximum supported by the VGA converter and HDMI Tx must be changed to the maximum timing or less |
0x7E is set to 00 |
No EDID expansion module |
change 0x7F |
The checksum must be recalculated based on the above changes |
HDMI2VGA:The HDMI2VGA converter must first provide the appropriate EDID content to the HDMI source before it can receive the desired 640 × 480p signal, or other common standards supported by the video source/display. HDMI Rx typically stores EDID content internally, handles hot-plug detection lines (indicating that a display is connected), and receives, decodes, and interprets incoming video and audio streams.
Since HDMI streams combine audio, video, and data, HDMI Rx must also support readback of auxiliary information such as color space, video standard, and audio mode. Most HDMI receivers will adaptively receive the stream, automatically converting any color space (YCbCr 4:4:4, YCbCr 4:2:2, RGB 4:4:4) to the RGB 4:4:4 color required by the video DAC space. Automatic Color Space Conversion (CSC) ensures that the correct color space is sent to the backend device.
After the input HDMI stream is processed and decoded to the desired standard, it is output through the pixel bus to the video DAC and audio codec. Video DACs typically have an RGB pixel bus and clock input, but no sync signal. The HSYNC and VSYNC signals can be buffered to the VGA output and finally to a monitor or other display.
HDMI audio streams can carry many different standards such as: L-PCM, DSD, DST, DTS, High Bit Rate Audio, AC3 and other compressed bit streams. Most HDMI receivers have no problem extracting the audio standard, but may have problems with further processing. Depending on the backend device, a simple standard may be preferred over a complex one so that it can be easily converted to an analog output for loudspeakers. The HDMI specification ensures that all devices support at least 32 kHz, 44.1 kHz and 48 kHz LPCM.
Therefore, it is necessary to generate an EDID signal that matches both the audio capability of the HDMI2VGA converter that extracts the audio, and the EDID of the original signal of the display that matches the original capability of the VGA display. This can be accomplished with a simple algorithm that retrieves the EDID content from the VGA display via the DDC line. The readback data should be parsed and verified to ensure that the monitor allows no higher frequencies than the HDMI Rx or video DAC supports (see Table 4). EDID mirroring can be extended with an additional CEA module listing audio capabilities to reflect that the HDMI2VGA converter only supports audio in the Linear PCM standard. Preliminary EDID data containing all modules can thus be provided to the HDMI source. The HDMI source should re-read the EDID from the converter after sending a pulse to the hot-plug detection line (part of the HDMI cable).
A simple microcontroller or CPU can be used to control the entire circuit, read the VGA EDID and program the HDMI Rx and audio DAC/codec. There is generally no need to control the video DAC as it does not have an I2Control ports such as C or SPI.
surface4. HDMI2VGAList of changes required by the converter
Change |
reason |
0x14[7]from 0 to 1 |
Indicates digital input |
Check standard timing information and change if necessary (bytes 0x26 to 0x35) |
Timings exceeding the maximum supported by the converter and HDMI Rx must be changed to the maximum timing or less |
Check DTD (Detailed Timing Descriptor) (bytes 0x36 to 0x47) |
Timings that exceed the maximum supported by the converter and HDMI Rx must be changed to the maximum timing or a smaller timing (for example, to 640 × 480p) |
0x7E is set to 1 |
A module must be added at the end of the EDID |
change 0x7F |
The checksum from bytes 0 to 0x7E must be recalculated |
Add additional CEA-861 modules |
|
0x80 to 0xFF describe audio |
Added CEA-861 module to indicate audio converter capability |
Content Protection Considerations
Typical analog VGAs do not provide content protection, so stand-alone converters should not allow decryption of content protection data, otherwise the end user would be able to access the raw word data. On the other hand, if the circuit is part of a larger device, it can be used as long as it does not allow the user to access the unencrypted video stream.
circuit example
The example VGA to HDMI board uses the high-performance 8-bit display interface AD9983A, which supports up to UXGA timing and RGB/YPbPr input, and the high-performance 165 MHz HDMI transmitter ADV7513, which supports 24-bit TTL input, 3D video, and variable input formats. Using these devices can quickly and easily build a VGA2HDMI converter. The ADV7513 also has a built-in DE generation block, eliminating the need for an external FPGA to generate missing DE signals. The ADV7513 also has an embedded EDID processing module that can automatically read back EDID information from HDMI Rx, or manually force read back.
Likewise, building an HDMI2VGA converter isn’t terribly complicated. Using the ADV7611, a low-power 165 MHz HDMI receiver, and the ADV7125, a three-channel, 8-bit, 330 MHz video DAC, a highly integrated video path can be constructed. Rx includes built-in EDID, circuitry to handle hot-swap set, automatic CSC that can output RGB 4:4:4 (regardless of the received color space), and a support for brightness/contrast adjustment and sync signal realignment Device processing module. Low power audio codec SSM2604 can decode stereo I2S stream and output at any volume through the DAC. The clock source for this audio codec can be obtained from the ADV7611 MCLK line, no external crystal is required, and configuration requires only a few writes.
A simple MCU, such as the precision analog microcontroller ADuC7020 with built-in oscillator, can control the entire system, including EDID processing, color enhancement and a simple user interface with buttons, scroll bars, and knobs.
Figure 6 and Figure 7 show example schematics of the video digitizer (AD9983A) and HDMI Tx (ADV7513), the important components of the VGA2HDMI converter, respectively. The MCU circuit is not included.
picture6. AD9983ASchematic
picture7. ADV7513Schematic
concluding remarks
ADI’s audio, video and microcontroller devices can implement highly integrated HDMI2VGA or VGA2HDMI converters that are powered from a small amount of power drawn from the USB connector.
Both converters show that applications using HDMI technology can be easily implemented using ADI devices. For devices that should work in an HDMI repeater configuration, the HDMI system complexity increases as this requires processing the HDCP protocol and the entire HDMI tree. Neither converter uses an HDMI repeater configuration.
Applications such as video sinks (displays), video generators (sources), and video converters require relatively small software stacks, so they can be implemented quickly and easily. For more information and schematics, see the Analog Devices Chinese Technical Forum webpage.
You are welcome to comment on HDMI-VGA conversion in the Analog Dialogue Community on Chinese Tech Forum.
references
A DTV Profile for Uncompressed High Speed Digital Interfaces (CEA-861-E).
Display Monitoring Timing (DMT), Coordinated Video Timing (CVT), and Enhanced Extended Display Identification Data (E-EDID) standards are available from VESA.
The Links: T298N12TOF LM8V301