Universal dynamic test and short-circuit test for testing power semiconductors

“During the design phase of the converter, calculations by Buri or Kolar et al. are usually performed, and simulations by Ferrieux et al. or Scheible are performed. They are based on the topology, control methods and operating conditions of a specific converter and semiconductor data that determine power semiconductor stress. These data usually consist of minimum and maximum values ​​that define limits and typical values ​​that provide additional information.

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International standards and drafts define most of the parameters to be specified for power semiconductors (IGBTs in this case) and the settings used to measure them. Data is categorized and annotated by purpose to provide a systematic approach to applications and tests.

Applied Representation Principles

During the design phase of the converter, calculations by Buri or Kolar et al. are usually performed, and simulations by Ferrieux et al. or Scheible are performed. They are based on the topology, control methods and operating conditions of a specific converter and semiconductor data that determine power semiconductor stress. These data usually consist of minimum and maximum values ​​that define limits and typical values ​​that provide additional information. Due to power losses, the safe operating area for normal operation is often limited by parameters such as breakdown voltage or maximum junction temperature, depending on:

Pvi are conduction, blocking, turn-on and turn-off losses, respectively; they will be considered further in the following sections. The calculation with the steady-state value R(thJA) in the above equation can be replaced by a network that considers the heat capacity C(thi), and the resistance value (Rthi) value or curve of Zth corresponds to this.

General Dynamic Testing

A schematic tester for general dynamic testing is shown in Figure 1. The DUT C schematic on the right shows that module C in a phase pin configuration consisting of T1, D1, T2 and D2 is controlled by two gate drivers Tr1 and Tr2. It is connected to the intermediate circuits L+ and L-. The ohmic or inductive load is connected to the positive or negative potential of the latter via switch S1 or S2, depending on the transistor or diode and transistor combination to be tested C T2 and D1 or T1 and D2. The switch TT in the intermediate circuit of C1 >> C2 isolates the buffer capacity C to the greatest extent possible if the device under test fails. The control of the tester is computer based. Voltage and current are monitored during the test, and the waveforms are then analyzed by a computer.

Figure 1 Resistive or Inductive Switch Tester

Short circuit test

A very robust short circuit tester according to Figure 2 has been created. Its controls give up feedback. By simply limiting the energy stored in the capacitor C_{1} or C_{2} of the device under test T_, any disturbance of the measurement by the series switch (T_{T} in Figure 1) and the potential failure occurred. {1} or T_{2} respectively connect to:

C is the capacity, Imax is the maximum short-circuit current through the device, Tshort,max is the maximum short-circuit time used, and ΔUmax is the maximum allowable voltage decay during the short-circuit. The mechanical layout of the power section with copper plates provides low inductance, so the test conditions highly correspond to those in the converter in which the power semiconductor device is designed to operate.

Figure 2 Short circuit tester

Methods have been proposed for characterizing fast-switching power semiconductors and fast-switching power semiconductors including power semiconductor devices of several types of switches. Information has been derived using the characteristic data for the calculation and simulation of the converter. Several disturbances are pointed out and equations are given. Their use allows application-specific parameters to be derived from general properties. Further, different test methods are derived. Their usage has been explained. A recently developed tester for performing the test method is described. The advantages and limitations of different tester concepts have been pointed out, which lead to the choice of tester type based on the measurements to be made.

Therefore, this paper shows that the subject of testing is related to the subject of computation and simulation of converters through general characteristics.